基本信息

叶靖  博士

中国科学院计算技术研究所

副研究员、硕士生导师

电子邮件: yejing@ict.ac.cn

研究方向

研究方向:数字集成电路EDA

教育/工作/任职

2008年:北京大学 信息科学与技术学院 学士学位

2014年:中科院计算所 博士学位 导师:李晓维研究员

2014年:中科院计算所 计算机体系结构国家重点实验室 助理研究员

2017年:中科院计算所 计算机体系结构国家重点实验室 副研究员,硕导

代表性成果


获奖

2019:中国产学研合作创新成果奖二等奖

2017:北京市科学技术奖二等奖

2014:IEEE测试技术委员会E. J. McCluskey博士论文奖亚洲赛区第二名

2014:中科院院长优秀奖

2013:博士研究生国家奖学金

论文

Jing Ye, Yu Hu, Xiaowei Li, Wu-Tung Cheng, Yu Huang, Huaxing Tang, "Diagnose Failures Caused by Multiple Locations At-a-Time," IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 22, no. 4, pp. 824-837, 2014

Jing Ye, Yu Huang, Yu Hu, Wu-Tung Cheng, Ruifeng Guo, Liyang Lai, Ting-Pu Tai, Xiaowei Li, Weipin Changchien, Daw-Ming Lee, Ji-Jan Chen, Sandeep C. Eruvathi, Kartik K. Kumara, Charles Liu, Sam Pan, "Diagnosis and Layout Aware (DLA) Scan Chain Stitching," IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 23, no. 3, pp. 466-479, 2015

Bing Li, Yu Hu, Ying Wang, Jing Ye, Xiaowei Li, "Power-Utility-Driven Write Management for MLC PCM," ACM Journal on Emerging Technologies in Computing Systems (JETC), vol. 13, no. 3, pp. 50:1-50:22, 2017

Xiaowei Li, Guihai Yan, Jing Ye, Ying Wang, "Fault Tolerance On-Chip: A Reliable Computing Paradigm Using Self-test, Self-diagnosis, and Self-repair (3S) Approach," Science China Information Sciences (SCIS), vol. 61, no. 11, pp. 1-17, 2018

Yu Hu, Jing Ye, Zhiping Shi, Xiaowei Li, "LAPS: Layout-Aware Path Selection for Post-Silicon Timing Characterization," IEICE Transactions on Information and Systems (TIS), vol. E100.D, no. 2, pp. 323-331, 2017

Weina Lu, Yu Hu, Jing Ye, Xiaowei Li, "Going Cooler with Timing-Constrained TeSHoP: A Temperature Sensing-Based Hotspot-Driven Placement Technique for FPGAs," IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 25, no. 9, pp. 2525-2537, 2017

Jing Ye, Yu Hu, Xiaowei Li, "VPUF: Voter based Physical Unclonable Function with High Reliability and Modeling Attack Resistance," IEEE International On-Line Testing Symposium(IOLTS), 2017

Jing Ye, Qingli Guo, Yu Hu, Xiaowei Li, "Deterministic and Probabilistic Diagnostic Challenge Generation for Arbiter Physical Unclonable Function," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 37, no. 12, pp.3186-3197, 2018

Qingli Guo, Jing Ye, Bing Li, Yu Hu, Xiaowei Li, Yazhu Lan, Guohe Zhang,     "PUFPass: A Password Management Mechanism based on Software/Hardware Codesign," Elsevier Integration the VLSI Journal (IVLSI), vol. 64, no. 1, pp. 173-183, 2019

Jing Ye, Xiaowei Li, Huawei Li, Yu Hu, "Adjustable Arbiter Physical Unclonable Function with Flexible Response Distribution," IEEE/SEMICON China Semiconductor Technology International Conference (CSTIC), 2019

Qingli Guo, Jing Ye, Yiran Chen, Yu Hu, Yazhu Lan, Guohe Zhang, Xiaowei Li, "INOR—An Intelligent Noise Reduction Method to Defend against Adversarial Audio Examples," Elsevier Neuro Computing, vol. 401, pp. 160-172, 2020

Yixuan Zhao, Zhiteng Chao, Jing Ye, Wen Wang, Yuan Cao, Shuai Chen, Xiaowei Li, Huawei Li, "Optimization Space Exploration of Hardware Design for CRYSTALS-KYBER," IEEE Asian Test Symposium (ATS), 2020

Xing Hu, Yang Zhao, Lei Deng, Ling Liang, Pengfei Zuo, Jing Ye, Yingyan Lin, Yuan Xie, "Practical Deep Neural Network Attacks through Memory Trojaning," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2020

专利

叶靖,胡瑜,李晓维,“一种集成电路故障诊断系统及方法,”中国,ZL200910237064.2

黄柯衡,叶靖,胡瑜,李晓维,“一种适用于FPGA的可靠性评估方法和装置,”中国,ZL201310594897.0

李晓维,胡瑜,叶靖,“一种高稳定性的强物理不可克隆函数电路及其设计方法,”中国,ZL201610074180.7

叶靖,胡瑜,李晓维,“一种CPU+FPGA集成芯片的强PUF认证方法及系统,”中国,ZL201610082885.3

叶靖,胡瑜,郭青丽,龚越,李晓维,“模糊输入输出的强物理不可克隆函数,”中国,ZL201610134261.1

叶靖,胡瑜,郭青丽,龚越,李晓维,“抗建模攻击的强物理不可克隆函数装置及其实现方法,”中国,ZL201610282695.6

Wu-Tung Cheng, Ruifeng Guo, Yu Huang, Liyang Lai, Etienne Racine, Martin Keim, Ronald Press, Jing Ye, Yu Hu, "Test Access Architecture for Stacked Memory and Logic Dies," United States, US9689918B1

Wu-Tung Cheng, Ruifeng Guo, Yu Huang, Liyang Lai, Jing Ye, Yu Hu, "Test Architecture for Characterizing Interconnects in Stacked Designs," United States, US9335376B2

叶靖,郭青丽,胡瑜,李晓维,“卷积神经网络模型计算装置及计算方法,”中国,ZL201810723272.2

郭青丽,叶靖,胡瑜,李晓维,“站点密码生成方法、系统及密码管理器,”中国,ZL201811086921.9